1. Field of the Invention
The invention relates to write and read operations of a memory device and particularly to write and read operations using error-correcting code (ECC) to correct errors during read and write operations.
2. Description of the Prior Art
On-chip error-correcting code has been used in memory devices for some time. Typically, such systematic ECC requires appending redundancy (also known as “parity” or “overhead”) to the data that is intended to be stored in the memory device. The concatenation of such data and parity is commonly referred to as a “codeword”. A data unit size refers to a size of the data that is stored in and/or read from the memory device by the user as a single unit. Examples of such data unit is a 32-bit data unit or a 64-bit data unit. Data size refers to size of the data portion of the codeword. Codeword size refers to size of the codeword
Generally, for a given ECC, such as single error correction, or double error detection an example of which is SEC-DED, a larger data size results in higher a code rate or less overhead. For example for a single error correction, double error detection (SEC-DED) ECC, a 32-bit data size, the SEC-DED requires 7 bits of redundancy resulting in a codeword having 21.8% overhead and a 64-bit data size requires 8 bits of redundancy (12.5% overhead), a 120-bit data size requires 8 bits of redundancy a 128-bit data size requires 9 bits of redundancy (7% over head) and a 256-bit data size requires 10 bits of redundancy (3.9% overhead).
To reduce the overhead of ECC, which increases the code rate, for a given ECC code, the data size (also referred to as “k”) the largest data size that meets the reliability requirements. In the above example, assuming all 4 data sizes meet reliability requirements, the code with a 256-bit data size is selected. The data unit size, the size of a unit of access to the memory device, is typically 8 or 16 or 32 bits. The unit of read access from the memory device is referred to herein as the “array read size”. The unit of write access to the memory device is referred to herein as the “array write size”.
In some prior art memory systems, the data unit size is the same as the data size. However, these prior art systems suffer from having a small data size with an overhead that is large. For example, a 32-bit data size has a codeword whose overhead makes up 21.8% of the codeword with SEC-DED.
In summary, prior art systems suffer from either having large data sizes that require numerous input/output pins therefore increasing the chip size and power consumption or compromise reliability by using inadequate overhead.
What is needed is a method and apparatus for reliability reading and writing to a memory device using ECC while maintaining low power consumption.